Revert Epreuve 3

2026-03-22 07:42:35 +01:00 · 2026-03-22 07:42:35 +01:00 · 5327eea72f
commit 5327eea72f
parent a1eb9116cc
1 changed files with 2 additions and 3 deletions
--- a/Epreuve3.py
+++ b/Epreuve3.py
@ -11,7 +11,7 @@
 # - Pile descendante, SP=255
 # ---------------------------------------------------------
 from dataclasses import dataclass, field
-import sys, time
+import sys


@dataclass
@ -246,9 +246,8 @@ class Simulator:
        steps = 0
        while self.cpu.running and steps < max_steps:
            result = self.step()
-            # yield result
+            yield result
            steps += 1
-            time.sleep(0.05)

    def dump_ram(self):
        print("\n========= RAM DUMP ========")